A Novel Fault-Tolerant Majority Gate Architecture for Robust Operation in QCA-Based Nano Circuits
- 1 Department of Electronics and Communication, L J Institute of Engineering and Technology, Makarba, Ahmedabad, Gujarat, India
- 2 Department of Electronics and Communication, Indus University, Rancharda, Ahmedabad, Gujarat, India
- 3 Department of Electronics and Communication, Pimpri Chinchwad College of Engineering, Nigdi, Pune, Maharashtra, India
Abstract
Quantum Dot Cellular Automata (QCA) is one of the promising alternatives to the traditional CMOS technologies for next-generation nanocomputing, which can be integrated at a higher density and has a higher possibility of low power consumption. Fabrication defects, environmental noise, and fault tolerance, especially in larger circuits, are challenging for practical implementation of QCA circuits. A new Fault-Tolerant Majority Gate (FTMG) is presented in this paper. This work analyzes various defects that can occur in the Majority Gate (MG) and then compares the fault tolerant majority gates based on the number of cells in the device, defect types and the degree of fault tolerance. This design of majority gate is simulated using QCADesigner 2.0.3. This paper focuses on the analysis of missing cells and displacement defects. The proposed majority gate is analyzed for both defects, and the full adder and decoder circuits are designed using the proposed MG.
DOI: https://doi.org/10.3844/jcssp.2026.2118.2129
Copyright: © 2026 Ami Patel, Vrushank Shah and Dipti Khurge. This is an open access article distributed under the terms of the
Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.
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Keywords
- Fault Tolerance
- Majority Gate (MG)
- Quantum Dot Cellular Automata (QCA)
- Single Missing Cell Defects (SMCD)
- Double Missing Cell Defects (DMCD)