A Bit-Serial Multiplier Architecture for Finite Fields Over Galois Fields

Abstract

Problem statement: A fundamental building block for digital communication is the Public-key cryptography systems. Public-Key Cryptography (PKC) systems can be used to provide secure communications over insecure channels without exchanging a secret key. Implementing Public-Key cryptography systems is a challenge for most application platforms when several factors have to be considered in selecting the implementation platform. Approach: The most popular public-key cryptography systems nowadays are RSA and Elliptic Curve Cryptography (ECC). ECC was considered much more suitable than other public-key algorithms. It used lower power consumption, has higher performance and can be implemented on small areas that can be achieved by using ECC. There is no sub exponential-time algorithm in solving the Elliptic curve discrete logarithm problem. Therefore, it offers smaller key size with equivalent security level compared with the other public key cryptosystems. Finite fields (or Galois fields) is considered as an important mathematical theory. Results: Thus, it plays an important role in cryptography. As a result of their carry free arithmetic property, they are suitable to be used in hardware implementation in ECC. In cryptography the most common finite field used is binary field GF (2^m). Conclusion: Our design performs all basic binary polynomial operations in Galois Field (GF) using a microcode structure. It uses a bit-serial and pipeline structure for implementing GF operations. Due to its bit-serial architecture, it has a low gate count and a reduced number of I/O pins.